TI SN74LV02AD
January 15, 2018 | Author: Anonymous | Category: N/A
Short Description
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Description
SCLS390J − APRIL 1998 − REVISED APRIL 2005
D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP (Output Ground Bounce)
13
3
12
4
11
5
10
6
9
7
8
1A 1B 2Y 2A 2B
14
1A 1Y NC VCC 4Y
1 2
13 4Y
3
12 4B
4
11 4A
5
10 3Y 9 3B
6 7
8
SN54LV02A . . . FK PACKAGE (TOP VIEW)
1B NC 2Y NC 2A
4
3 2 1 20 19 18
5
17
6
16
7
15
8
14 9 10 11 12 13
4B NC 4A NC 3Y
2B GND NC 3A 3B
2
VCC 4Y 4B 4A 3Y 3B 3A
VCC
14
3A
1
Operation Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101)
SN74LV02A . . . RGY PACKAGE (TOP VIEW)
SN54LV02A . . . J OR W PACKAGE SN74LV02A . . . D, DB, DGV, NS, OR PW PACKAGE (TOP VIEW)
1Y 1A 1B 2Y 2A 2B GND
D
1Y
D
D
2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on All Ports
GND
D
D Ioff Supports Partial-Power-Down Mode
NC − No internal connection
description/ordering information The ’LV02A devices are quadruple 2-input positive-NOR gates designed for 2-V to 5.5-V VCC operation. The ’LV02A devices perform the Boolean function Y = A + B or Y = A • B in positive logic. These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. ORDERING INFORMATION
QFN − RGY
SN74LV02ARGYR
Tube of 50
SN74LV02AD
Reel of 2500
SN74LV02ADR
SOP − NS
Reel of 2000
SN74LV02ANSR
74LV02A
SSOP − DB
Reel of 2000
SN74LV02ADBR
LV02A
Tube of 90
SN74LV02APW
Reel of 2000
SN74LV02APWR
TSSOP − PW
−55°C −55 C to 125 125°C C
TOP-SIDE MARKING
Reel of 1000
SOIC − D
−40°C −40 C to 85 85°C C
ORDERABLE PART NUMBER
PACKAGE†
TA
LV02A LV02A
LV02A
Reel of 250
SN74LV02APWT
TVSOP − DGV
Reel of 2000
SN74LV02ADGVR
LV02A
CDIP − J
Tube of 25
SNJ54LV02AJ
SNJ54LV02AJ
CFP − W
Tube of 150
SNJ54LV02AW
SNJ54LV102AW
LCCC − FK
Tube of 55
SNJ54LV02AFK
SNJ54LV02AFK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2005, Texas Instruments Incorporated
!"#$ $%$ & $'("%$ !((#$ % ' )!*+%$ %#, (! $'(" )#'%$ )#( # #(" ' #-% $(!"#$ %$%( .%((%$/, (!$ )(#$0 # $ $##%(+/ $+!# #$0 ' %++ )%(%"##(, POST OFFICE BOX 655303
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1
SCLS390J − APRIL 1998 − REVISED APRIL 2005
FUNCTION TABLE (each gate) INPUTS A
B
OUTPUT Y
H
X
L
X
H
L
L
L
H
logic diagram (positive logic) A
Y
B
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Output voltage range, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, θJA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W (see Note 3): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W (see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W (see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W (see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51-7. 4. The package thermal impedance is calculated in accordance with JESD 51-5.
2
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SCLS390J − APRIL 1998 − REVISED APRIL 2005
recommended operating conditions (see Note 5) SN54LV02A VCC
VIH
High-level input voltage
VIL
Low-level input voltage
VI VO
Input voltage
IOH
IOL
∆t/∆v
MIN
MAX
2
5.5
Supply voltage VCC = 2 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V
1.5
2
5.5
VCC × 0.7 VCC × 0.7
VCC × 0.7
VCC × 0.7
Output voltage
UNIT V
V
0.5
0.5
VCC × 0.3 VCC × 0.3
VCC × 0.3 VCC × 0.3
VCC × 0.3 5.5
0 0
0
VCC −50
VCC = 2 V VCC = 2.3 V to 2.7 V
VCC × 0.3 5.5
0
VCC −50
−2
VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V
V
V V µA
−2
−6
−6
−12
−12
VCC = 2 V VCC = 2.3 V to 2.7 V
50
50
2
2
VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V
6
6
12
12
200
200
100
100
20
20
VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V
Input transition rise or fall rate
MAX
VCC × 0.7 VCC × 0.7
VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V
Low-level output current
MIN 1.5
VCC = 2 V VCC = 2.3 V to 2.7 V
High-level output current
SN74LV02A
mA µA mA
ns/V
TA Operating free-air temperature −55 125 −40 85 °C NOTE 5: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN54LV02A PARAMETER
VOH
VOL
TEST CONDITIONS IOH = −50 µA IOH = −2 mA
IOL = 50 µA IOL = 2 mA IOL = 6 mA IOL = 12 mA VI = 5.5 V or GND VI = VCC or GND,
Ioff Ci
VI or VO = 0 to 5.5 V VI = VCC or GND
MIN
2 V to 5.5 V
IOH = −6 mA IOH = −12 mA
II ICC
VCC
IO = 0
TYP
SN74LV02A MAX
MIN
2.3 V
VCC−0.1 2
VCC−0.1 2
3V
2.48
2.48
4.5 V
3.8
TYP
MAX
UNIT
V
3.8
2 V to 5.5 V
0.1
0.1
2.3 V
0.4
0.4
3V
0.44
0.44
4.5 V
V
0.55
0.55
0 V to 5.5 V
±1
±1
µA
5.5 V
20
20
µA
0
5
5
µA
3.3 V
1.6
1.6
pF
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SCLS390J − APRIL 1998 − REVISED APRIL 2005
switching characteristics over recommended operating VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1) PARAMETER
FROM (INPUT)
TO (OUTPUT)
tpd
A or B
Y
LOAD CAPACITANCE
MIN
free-air
TA = 25°C TYP MAX
temperature
SN54LV02A
range,
SN74LV02A
MIN
MAX
MIN
MAX
CL = 15 pF
8.3*
12.4*
1*
15*
1
15
CL = 50 pF
11
16.1
1
19
1
19
UNIT ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
switching characteristics over recommended operating VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER
FROM (INPUT)
TO (OUTPUT)
tpd
A or B
Y
free-air
LOAD CAPACITANCE
TA = 25°C MIN TYP MAX
CL = 15 pF
5.6*
CL = 50 pF
7.6
temperature
SN54LV02A
range,
SN74LV02A
MIN
MAX
MIN
MAX
7.9*
1*
9.5*
1
9.5
11.4
1
13
1
13
UNIT ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
switching characteristics over recommended operating VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER
FROM (INPUT)
TO (OUTPUT)
tpd
A or B
Y
LOAD CAPACITANCE
MIN
free-air
TA = 25°C TYP MAX
temperature
SN54LV02A
range,
SN74LV02A
MIN
MAX
MIN
MAX
CL = 15 pF
3.9*
5.5*
1*
6.5*
1
6.5
CL = 50 pF
5.3
7.5
1
8.5
1
8.5
UNIT ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
noise characteristics, VCC = 3.3 V, CL = 50 pF, TA = 25°C (see Note 6) SN74LV02A PARAMETER
MIN
TYP
MAX
UNIT
VOL(P) VOL(V)
Quiet output, maximum dynamic VOL
0.2
0.8
V
Quiet output, minimum dynamic VOL
−0.1
−0.8
V
VOH(V) VIH(D)
Quiet output, minimum dynamic VOH
3.2
High-level dynamic input voltage
V
2.31
V
VIL(D) Low-level dynamic input voltage NOTE 6: Characteristics are for surface-mount packages only.
0.99
V
VCC 3.3 V
TYP
UNIT
5V
10.3
operating characteristics, TA = 25°C PARAMETER Cpd
Power dissipation capacitance
TEST CONDITIONS CL = 50 pF,
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f = 10 MHz
8.9 pF
SCLS390J − APRIL 1998 − REVISED APRIL 2005
PARAMETER MEASUREMENT INFORMATION
From Output Under Test
RL = 1 kΩ
From Output Under Test
Test Point
VCC Open
S1
TEST
GND
CL (see Note A)
CL (see Note A)
S1
tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain
Open VCC GND VCC
LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS
LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS
VCC 50% VCC
Timing Input
0V
tw tsu
VCC 50% VCC
Input
50% VCC
th VCC 50% VCC
Data Input
50% VCC
0V
0V
VOLTAGE WAVEFORMS PULSE DURATION
VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VCC
50% VCC
Input
50% VCC
tPLH In-Phase Output
tPHL 50% VCC
tPHL Out-of-Phase Output
0V
VOH 50% VCC VOL
50% VCC
VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS
50% VCC
50% VCC 0V tPLZ
tPZL Output Waveform 1 S1 at VCC (see Note B)
tPLH VOH 50% VCC VOL
VCC
Output Control
≈VCC 50% VCC
tPHZ
tPZH Output Waveform 2 S1 at GND (see Note B)
VOL + 0.3 V VOL
50% VCC
VOH − 0.3 V
VOH ≈0 V
VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time, with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPHL and tPLH are the same as tpd. H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
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5
PACKAGE OPTION ADDENDUM www.ti.com
9-Aug-2005
PACKAGING INFORMATION Orderable Device
Status (1)
Package Type
Package Drawing
Pins Package Eco Plan (2) Qty
SN74LV02AD
ACTIVE
SOIC
D
14
SN74LV02ADBR
ACTIVE
SSOP
DB
SN74LV02ADBRE4
ACTIVE
SSOP
SN74LV02ADE4
ACTIVE
SN74LV02ADGVR
50
Lead/Ball Finish
MSL Peak Temp (3)
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
14
2000 Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
DB
14
2000 Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SOIC
D
14
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
ACTIVE
TVSOP
DGV
14
2000 Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV02ADGVRE4
ACTIVE
TVSOP
DGV
14
2000 Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV02ADR
ACTIVE
SOIC
D
14
2500 Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV02ADRE4
ACTIVE
SOIC
D
14
2500 Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV02ANSR
ACTIVE
SO
NS
14
2000 Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV02ANSRE4
ACTIVE
SO
NS
14
2000 Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV02APW
ACTIVE
TSSOP
PW
14
90
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV02APWE4
ACTIVE
TSSOP
PW
14
90
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV02APWG4
ACTIVE
TSSOP
PW
14
90
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV02APWR
ACTIVE
TSSOP
PW
14
2000 Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV02APWRE4
ACTIVE
TSSOP
PW
14
2000 Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV02APWRG4
ACTIVE
TSSOP
PW
14
2000 Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV02APWT
ACTIVE
TSSOP
PW
14
250
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV02APWTE4
ACTIVE
TSSOP
PW
14
250
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV02ARGYR
ACTIVE
QFN
RGY
14
1000 Green (RoHS & no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
50
(1)
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
Addendum-Page 1
PACKAGE OPTION ADDENDUM www.ti.com
9-Aug-2005
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,40
0,23 0,13
24
13
0,07 M
0,16 NOM 4,50 4,30
6,60 6,20
Gage Plane
0,25 0°–8° 1
0,75 0,50
12 A
Seating Plane 0,15 0,05
1,20 MAX
PINS **
0,08
14
16
20
24
38
48
56
A MAX
3,70
3,70
5,10
5,10
7,90
9,80
11,40
A MIN
3,50
3,50
4,90
4,90
7,70
9,60
11,20
DIM
4073251/E 08/00 NOTES: A. B. C. D.
All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN 0,38 0,22
0,65 28
0,15 M
15
0,25 0,09 8,20 7,40
5,60 5,00
Gage Plane 1
14
0,25
A
0°–ā8°
0,95 0,55
Seating Plane 2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01 NOTES: A. B. C. D.
All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150
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MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30 0,19
0,65 14
0,10 M
8
0,15 NOM 4,50 4,30
6,60 6,20 Gage Plane 0,25
1
7 0°– 8° A
0,75 0,50
Seating Plane 0,15 0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97 NOTES: A. B. C. D.
All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153
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Applications
Amplifiers
amplifier.ti.com
Audio
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
www.ti.com/broadband
Interface
interface.ti.com
Digital Control
www.ti.com/digitalcontrol
Logic
logic.ti.com
Military
www.ti.com/military
Power Mgmt
power.ti.com
Optical Networking
www.ti.com/opticalnetwork
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
Telephony
www.ti.com/telephony
Video & Imaging
www.ti.com/video
Wireless
www.ti.com/wireless
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Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2005, Texas Instruments Incorporated
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