FAIRCHILD RMWB04001

RMWB04001 4 GHz Buffer Amplifier MMIC General Description

Features

The RMWB04001 is a 2-stage GaAs MMIC amplifier designed as a 3.5 to 4 GHz Buffer Amplifier for use in point to point and point to multi-point radios, and various communications applications. In conjunction with other amplifiers, multipliers and mixers it forms part of a complete 23 and 26 GHz transmit/receive chipset. The RMWB04001 utilizes our 0.25µm power PHEMT process and can be used in a variety of applications requiring a high gain medium power amplifier.

• 4 mil substrate • Small-signal gain 27dB (typ.) • Saturated Power Out 20dBm (typ.) • Voltage Detector Included to Monitor Pout • Chip size 2.4mm x 1.3mm x 100µm

Device

Absolute Ratings Symbol Vd Vg Vdg ID PIN TC TSTG RJC

Parameter Positive DC Voltage (+4V Typical) Negative DC Voltage Simultaneous (Vd–Vg) Positive DC Current RF Input Power (from 50Ω source) Operating Baseplate Temperature Storage Temperature Range Thermal Resistance (Channel to Backside)

©2004 Fairchild Semiconductor Corporation

Ratings +6 -2 8 168 +7 -30 to +85 -55 to +125 140

Units V V V mA dBm °C °C °C/W

RMWB04001 Rev. C

RMWB04001

June 2004

Parameter Frequency Range Gate Supply Voltage1 (Vg) Gain (Small Signal at Pin = -12dBm) Gain Variation vs. Frequency Power Output Saturated: (Pin = -2dBm) Input Return Loss (Pin = -12dBm) Output Return Loss (Pin = -12dBm) DC Detector Voltage at Pout = 20dBm

Min 3.5 24 18

Typ

Max 4.0

-0.7 27 0.5 20 14 12 0.5

Units GHz V dB dB dBm dB dB V

Note: 1: Typical range of gate voltage is -1 to -0.4V to set typical Idq of 36mA.

Functional Block Diagram1 DRAIN SUPPLY Vd1

DRAIN SUPPLY Vd2

OUTPUT POWER DETECTOR VOLTAGE Vdet

MMIC CHIP RF IN

RF OUT

GROUND (Back of Chip)

GATE SUPPLY Vg

Note: 1: Detector delivers > 0.1V DC into 3kΩ load resistor for > 20dBm output power. If output power level detection is not desired, do not make connection to detector bond pad.

©2004 Fairchild Semiconductor Corporation

RMWB04001 Rev. C

RMWB04001

Electrical Characteristics (At 25°C), 50Ω system, Vd = +4V, Quiescent Current (Idq) = 36mA

CAUTION: THIS IS AN ESD SENSITIVE DEVICE. Chip carrier material should be selected to have GaAs compatible thermal coefficient of expansion and high thermal conductivity such as copper molybdenum or copper tungsten. The chip carrier should be machined, finished flat, plated with gold over nickel and should be capable of withstanding 325°C for 15 minutes. Die attachment for power devices should utilize Gold/Tin (80/20) eutectic alloy solder and should avoid hydrogen environment for PHEMT devices. Note that the backside of the chip is gold plated and is used as RF and DC ground. These GaAs devices should be handled with care and stored in dry nitrogen environment to prevent contamination of bonding surfaces. These are ESD sensitive devices and should be handled with appropriate precaution including the use of wrist grounding straps. All die attach and wire/ribbon bond equipment must be well grounded to prevent static discharges through the device. Recommended wire bonding uses 3mils wide and 0.5mil thick gold ribbon with lengths as short as practical allowing for appropriate stress relief. The RF input and output bonds should be typically 12 mils long corresponding to a typical 2 mil gap between the chip and the substrate material.

0.00

0.57

1.32

2.08 2.28

2.40

1.30 1.19

1.30 1.19

0.57

0.57

0.11 0.00

0.11 0.00 0.00 0.11

1.14

2.28

2.40

Dimensions in mm

Figure 1. Chip Layout and Bond Pad Locations Chip Size is 2.40mm x 1.3mm X 100µm. Back of chip is RF and DC Ground.

©2004 Fairchild Semiconductor Corporation

RMWB04001 Rev. C

RMWB04001

Application Information

Drain Supply Vd=4 V

L = Bond Wires

RMWB04001

Output Power Detector Voltage Vdet 10,000 pF 3 kΩ L

L 100 pF

100 pF

100 pF L

L

L

MMIC CHIP

RF OUT

RF IN

L

100 pF

Ground (Back of Chip)

L 10,000 pF

Gate Supply Vg Note: Detector delivers > 0.1V DC into 3kΩ load resistor for >20 dBm output power. If output power level detection is not desired, do not connect to detector bond pad.

Figure 2. Recommended Application Schematic Circuit Diagram 10,000pF

Drain Supply Vd= 4

Die-Attach 80Au/20Sn

3kΩ 100pF 100pF

5mil Thick Alumina 50-Ohm

Output Power Detector Voltage Vdet 100pF

5 mil Thick Alumina 50-Ohm

RF Input

RF Output

100pF

L< 0.015" (2 Places)

10,000pF 2 mil Gap

Gate Supply Vg

Note: Use 0.003" by 0.0005" Gold Ribbon for bonding. RF input and output bonds should be less than 0.015" long with stress relief.

Figure 3. Recommended Assembly Diagram ©2004 Fairchild Semiconductor Corporation

RMWB04001 Rev. C

CAUTION: LOSS OF GATE VOLTAGE (Vg) WHILE DRAIN VOLTAGE (Vd) IS PRESENT MAY DAMAGE THE AMPLIFIER CHIP. The following sequence of steps must be followed to properly test the amplifier: Step 1: Turn off RF input power. Step 2: Connect the DC supply grounds to the ground of the chip carrier. Slowly apply negative gate bias supply voltage of -1.5V to Vg.

©2004 Fairchild Semiconductor Corporation

Step 3: Slowly apply positive drain bias supply voltage of +4V to Vd. Step 4: Adjust gate bias voltage to set the quiescent current of Idq = 36mA. Step 5: After the bias condition is established, the RF input signal may now be applied at the appropriate frequency band. Step 6: Follow turn-off sequence of: (i) Turn off RF input power, (ii) Turn down and off drain voltage (Vd), (iii) Turn down and off gate bias voltage (Vg).

RMWB04001 Rev. C

RMWB04001

Recommended Procedure for Biasing and Operation

Typical Small Signal Performance On-Wafer measurements, Vd = 4V, Idq = 36mA, T = 25°C 30

-5

25

-10 S22

25 24

-15 -20

S11

23

-25

22 3.5

3.6

3.7

3.8

3.9

-5 S22

20

-10

15

-15

10

-20 S11

5

-30

0

S21

-25

0

4

S11, S22 (dB)

S21 (dB)

26

0

S21 (dB)

S21

27

S11, S22 (dB)

28

-30 0

1

FREQUENCY (GHz)

2 3 4 5 FREQUENCY (GHz)

6

Power Output and Gain vs. Power In 50Ω Fixture Measurements, Vd = 4V, Idq = 36mA, T = 25°C 22

29

20

28 27 4.0 GHz

16

26

14

25 3.5 GHz

12

24

10 8 -16

GAIN (dB)

Pout (dBm)

18

23 22 -14

-12

-10

-8

-6

-4

-2

PIN (dBm)

Power Output and Gain at 3dB vs. Frequency and Temperature 50Ω Fixture Measurements, Vd = 4V, Idq = 36mA 23.6

20.2 P3dB (T = 25°C) G3dB (T = 25°C)

23.2 P3dB (T = 75°C) 22.8

20.0 G3dB (T = 75°C) 19.9

G3dB (dBm)

P3dB (dBm)

20.1

22.4

19.8 3.5

3 .6

3.7

3.8

3.9

22.0 4.0

FREQUENCY (GHz)

©2004 Fairchild Semiconductor Corporation

RMWB04001 Rev. C

RMWB04001

Performance Data

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Product Status

Definition

Advance Information

Formative or In Design

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

No Identification Needed

Full Production

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

Obsolete

Not In Production

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I11